Cirrus-logic EP7309 Manual do Utilizador descarregar pdf (Página 20)

20 Copyright Cirrus Logic, Inc. 2011

EP7309

High-Performance, Low-Power System on Chip

SSI1 Interface

Parameter Symbol Min Max Unit

ADCCLK falling edge to nADCCSS deassert delay time

910ms

ADCIN data setup to ADCCLK rising edge time

INs

-15ns

ADCIN data hold from ADCCLK rising edge time

INh

-14ns

ADCCLK falling edge to data valid delay time

Ovd

 713ns

ADCCLK falling edge to data invalid delay time

 23 ns

ADC

CLK

nADC

CSS

ADCIN

ADC

OUT

INs

INh

Ovd

Figure 7. SSI1 Interface Timing Measurement

1 2 ... 15 16 17 18 19 20 21 22 23 24 25 ... 41 42

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