Cirrus-logic CS4354 Manual do Utilizador descarregar pdf (Página 9)

DS895F2 9

CS4354

Figure 1. External Serial Clock Mode Input Timing

Figure 2. Internal Serial Clock Mode Input Timing

Figure 3. Internal Serial Clock Generation

sclkh

slrs

slrd

sdlrs

sdh

sclkl

SDIN

SCLK

LRCK

SDIN

LRCK

MCLK

mclkf

sclkr

sdh

dlrs

INTERNAL

SCLK

sclkw

The SCLK pulses shown are internal to the CS4354.

SDIN

LRCK

MCLK

*INTERNAL SCLK

* The SCLK pulses shown are internal to the CS4354.

N equals MCLK divided by SCLK

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Cirrus-logic CS4354 Manual do Utilizador Página 9