Cirrus-logic CS4207 Manual do Utilizador

Consulte online ou descarregue Manual do Utilizador para Hardware Cirrus-logic CS4207. Cirrus Logic CS4207 User Manual Manual do Utilizador

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Copyright Cirrus Logic, Inc. 2012
(All Rights Reserved)
http://www.cirrus.com
AUG '12
DS880F4
Low-power, 4-in / 6-out HD Audio Codec with Headphone Amp
DIGITAL to ANALOG FEATURES
DAC1 (Headphone)
101 dB Dynamic Range (A-wtd)
-89 dB THD+N
Headphone Amplifier - GND Centered
Integrated Negative-voltage Regulator
No DC-blocking Capacitor Required
50 mW Power/Channel into 16
DAC2 & DAC3 (Line Outs)
110 dB Dynamic Range (A-wtd)
-94 dB THD+N
Differential Balanced or Single-ended
Each DAC Supports 32 kHz to 192 kHz Sample
Rates Independently.
Digital Volume Control
+6.0 dB to -57.5 dB in 0.5 dB Steps
Zero Cross and/or Soft Ramp Transitions
Independent Support of D0 and D3 Power
States for Each DAC
Fast D3 to D0 Transition
Audio Playback in Less Than 50 ms
ANALOG to DIGITAL FEATURES
ADC1 & ADC2
105 dB Dynamic Range (A-wtd)
-88 dB THD+N
Differential Balanced or Single-ended
Inputs
Analog Programmable Gain Amplifier
(PGA) ±12 dB, 1.0 dB Steps, with Zero
Cross Transitions and Mute
MIC Inputs
Pre-amplifier with Selectable 0 dB, +10 dB,
+20 dB, and +30 dB Gain Settings
Programmable, Low-noise MIC Bias Level
Each ADC Supports 8 kHz to 96 kHz Sample
Rates Independently
Additional Digital Attenuation Control
-13.0 dB to -51.0 dB in 1.0 dB steps
Zero Cross and/or Soft Ramp Transitions
Digital Interface for Two Dual Digital Mic Inputs
Independent Support of D0 and D3 Power
States for Each ADC
VL_HD
(1.5 V to 3.3 V)
SRC &
Multibit 
Modulator
Chrg
Pump
Invert
Left HP Out
Left Line Out
2-Chnl
ADC1
Level Translator
HD Audio
Bus
Line/Mic In L
Line/Mic In R
Headphone
Amp - GND
Centered
MIC
Bias
2-Chnl
DAC1
Line
Out
+
-
Right Line Out
+
-
Left Line Out
Line
Out
+
-
Right Line Out
+
-
+
-
+
PGA
Digital
Filter &
SRC
2-Chnl
ADC2
Mic/Line In L
Mic/Line In R
+
-
+
-
PGA
Digital
Filter &
SRC
D-Mic Clock
SPDIF
TX 1
SPDIF
RX SRC
S/PDIF OUT 1
S/PDIF IN
GPIOGPIO
Right HP Out
D-Mic In
HD
Audio
Interface
Chrg
Pump
Buck
+VHP
-VHP
2-Chnl
DAC2
2-Chnl
DAC3
SRC &
Multibit 
Modulator
SRC &
Multibit 
Modulator
VD
(1.5 V to 1.8 V)
Vol/Mute
Vol/Mute
Vol/Mute
Vol/Boost/
Mute
Vol/Boost/
Mute
VA, VA_REF
(3.3 V to 5.0 V)
VA_HP
(3.3 V to 5.0 V)
Mic Bias
Level Translator
VL_IF
(3.3 V)
Jack
Sense
SENSE_A
SPDIF
TX 2
S/PDIF OUT 2
128Fs Clock
Multiplier
HD Bus
Fs
SPDIF
RX
CS4207
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Resumo do Conteúdo

Página 1 - ANALOG to DIGITAL FEATURES

Copyright  Cirrus Logic, Inc. 2012(All Rights Reserved)http://www.cirrus.comAUG '12 DS880F4Low-power, 4-in / 6-out HD Audio Codec with Headphone

Página 2 - General Description

10 DS880F4CS42071.2 Digital I/O Pin CharacteristicsInput and output levels and associated power supply voltage are shown in the table below. Logic lev

Página 3 - TABLE OF CONTENTS

100 DS880F4CS4207Set Parameter Command Format:Response Format:PS-Set is a PowerState field which defines the current power setting of the referenced n

Página 4

DS880F4 101CS42076.11.7 Line In 1/Mic In 2 Pin Widget ControlGet Parameter Command Format:Set Parameter Command Format:Response Format:6.11.8 Mic In 1

Página 5

102 DS880F4CS42076.11.9 Unsolicited Response ControlGet Parameter Command Format:Set Parameter Command Format:Response Format: Bits [31:0] are sticky

Página 6

DS880F4 103CS42076.11.10 Pin SenseGet Parameter Command Format:Set Parameter Command Format:Get Response Format:Pin Sense Execute Format:Bits [31:28]

Página 7 - LIST OF TABLES

104 DS880F4CS42076.11.11 Mic In 1/Line In 2 EAPD/BTL EnableGet Parameter Command Format:Set Parameter Command Format:Get Response Format:6.11.12 Line

Página 8 - 1. PIN DESCRIPTIONS

DS880F4 105CS4207Response Format: Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset:6.11.13 Mic In 1/Line In 2 Configurati

Página 9 - Pin Name QFN Pin Description

106 DS880F4CS4207Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset:6.11.14 Amplifier Gain/MuteGet Parameter Command Format

Página 10

DS880F4 107CS4207Response Format:Set Parameter Command Format:Bits [19:16] = ‘3h’, where bits [15:0] are defined below:Bits Type Default Description31

Página 11 - DS880F4 11

108 DS880F4CS42076.12 Digital Mic In 1, Digital Mic In 2 Pin Widgets (Node ID = 0Eh, 12h)6.12.1 Audio Widget CapabilitiesGet Parameter Command Format:

Página 12 - 12 DS880F4

DS880F4 109CS42076.12.2 Pin CapabilitiesGet Parameter Command Format:Response Format:6.12.3 Input Amplifier CapabilitiesGet Parameter Command Format:R

Página 13 - ABSOLUTE MAXIMUM RATINGS

DS880F4 11CS42072. TYPICAL CONNECTION DIAGRAMS1 µFVREF+0.1 µFHP_GND(Thermal Pad)VL_HD0.1 µF+1.5 V to +3.3 VRESET#SDIBITCLKSYNCVA* Capacitors must be C

Página 14 - (Note 4)

110 DS880F4CS42076.12.4 Pin Widget ControlGet Parameter Command Format:Set Parameter Command Format:Response Format:6.12.5 Digital Mic In 1 Configurat

Página 15

DS880F4 111CS4207Response Format: Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset:6.12.6 Digital Mic In 2 Configuration

Página 16 - (48 kHz Fs)

112 DS880F4CS4207Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset:6.12.7 Amplifier Gain/MuteGet Parameter Command Format:

Página 17

DS880F4 113CS4207Response Format:Set Parameter Command Format:Bits [19:16] = ‘3h’, where bits [15:0] are defined below:Bits Type Default Description31

Página 18 - LINEOUT_L/R

114 DS880F4CS42076.13 S/PDIF Receiver Input Pin Widget (Node ID = 0Fh)6.13.1 Audio Widget CapabilitiesGet Parameter Command Format:Response Format:Bit

Página 19

DS880F4 115CS42076.13.2 Pin CapabilitiesGet Parameter Command Format:Response Format:6.13.3 Supported Power StatesGet Parameter Command Format:Respons

Página 20 - HPOUT_L/R

116 DS880F4CS42076.13.4 Power StatesGet Parameter Command Format:Set Parameter Command Format:Response Format:PS-Set is a PowerState field which defin

Página 21 - Parameters Min Typ Max Units

DS880F4 117CS42076.13.5 Pin Widget ControlGet Parameter Command Format:Set Parameter Command Format:Response Format:6.13.6 Unsolicited Response Contro

Página 22 - DMIC_SDA

118 DS880F4CS4207Unsolicited Response Format: 6.13.7 Pin SenseGet Parameter Command Format:Set Parameter Command Format:Get Response Format:Pin Sense

Página 23 - DS880F4 23

DS880F4 119CS42076.13.8 Configuration DefaultThe Configuration Default register is used by software as an aid in determining the configuration of jack

Página 24 - POWER CONSUMPTION

12 DS880F4CS4207* Capacitors must be C0G or equivalentSpeaker Driver 2200 pF560 *Speaker Driver 2200 pF560 *560 560 1 µFVREF+0.1 µFHP_GND(Thermal

Página 25 - 4.3 Codec Initialization

120 DS880F4CS42076.14 S/PDIF Transmitter 1, S/PDIF Transmitter 2 Output Pin Widgets (Node ID = 10h, 15h)6.14.1 Audio Widget CapabilitiesGet Parameter

Página 26 - 26 DS880F4

DS880F4 121CS42076.14.2 Pin CapabilitiesGet Parameter Command Format:Response Format:6.14.3 Connection List LengthGet Parameter Command Format:Respons

Página 27

122 DS880F4CS42076.14.4 S/PDIF Transmitter 1 Connection List EntryGet Parameter Command Format:Response Format:6.14.5 S/PDIF Transmitter 2 Connection

Página 28 - 28 DS880F4

DS880F4 123CS42076.14.6 Pin Widget ControlGet Parameter Command Format:Set Parameter Command Format:Response Format:Bits [31:28] Bits [27:20] Bits [19

Página 29

124 DS880F4CS42076.14.7 S/PDIF Transmitter 1 Configuration DefaultThe Configuration Default register is used by software as an aid in determining the

Página 30

DS880F4 125CS42076.14.8 S/PDIF Transmitter 2 Configuration DefaultThe Configuration Default register is used by software as an aid in determining the

Página 31 - 5. PRESENCE DETECTION

126 DS880F4CS42076.15 Vendor Processing Widget (Node ID = 11h)6.15.1 Audio Widget CapabilitiesGet Parameter Command Format:Response Format:6.15.2 Proc

Página 32 - 32 DS880F4

DS880F4 127CS42076.15.3 Processing StateGet Parameter Command Format:Set Parameter Command Format:Response Format:6.15.4 Coefficient IndexThe Coeffici

Página 33 - DS880F4 33

128 DS880F4CS42076.15.5 Processing CoefficientProcessing Coefficient loads the value n into the widget’s coefficient array at the index determined by

Página 34 - 6.1.1 Node ID Summary

DS880F4 129CS42076.15.6.1 S/PDIF RX/TX Interface Status (CIR = 0000h)Bits Type Default Description15:10 Read Only 0 Reserved9 Read Only 0b192 kHz Reco

Página 35 - DS880F4 35

DS880F4 13CS42073. CHARACTERISTICS AND SPECIFICATIONSRECOMMENDED OPERATING CONDITIONS(AGND=DGND=0 V, all voltages with respect to ground.) ABSOLUTE

Página 36 - 6.2.3 Subordinate Node Count

130 DS880F4CS42076.15.6.2 S/PDIF RX/TX Interface Control (CIR = 0001h)Bits Type Default Description15 Read Only 0b Reserved14 Read/Write 0bTX 2 Enable

Página 37 - 6.3.2 Function Group Type

DS880F4 131CS42076.15.6.3 ADC Configuration (CIR = 0002h)4:3 Read/Write 01bHOLD[1:0] – Determines how received AES3 audio sample is affected when an r

Página 38 - 38 DS880F4

132 DS880F4CS420712:11 Read/Write 00b ADC2 Channel Mode[1:0]: Controls the chan-nel mapping from the ADC2 output to the HDA bus.‘00’b - ADC2 left chan

Página 39 - 6.3.6 Supported Power States

DS880F4 133CS42071:0 Read/Write 10bADC1 SZCMode[1:0]: Sets the mode by which analog PGA and digital volume, and muting changes will be implemented. Se

Página 40 - 6.3.7 GPIO Capabilities

134 DS880F4CS42076.15.6.4 DAC Configuration (CIR = 0003h)Bits Type Default Description15:13 Read/Write 000b Reserved12 Read/Write 1bEnable DACs High P

Página 41 - 6.3.8 Power States

DS880F4 135CS42076.15.6.5 Beep Configuration (CIR = 0004h)1:0 Read/Write 10bDAC1 SZCMode[1:0]: Sets the soft ramp and zero crossing detection modes by

Página 42 - 6.3.9 GPIO Data

136 DS880F4CS42076.16 Beep Generator Widget (Node ID = 13h)6.16.1 Audio Widget CapabilitiesGet Parameter Command Format:Response Format:Bits [31:28] B

Página 43 - 6.3.12 GPIO Sticky Mask

DS880F4 137CS42076.16.2 Beep Generation ControlGet Parameter Command Format:Set Parameter Command Format:Response Format:Bits [31:28] Bits [27:20] Bit

Página 44 - 6.3.14 Function Reset

138 DS880F4CS42077. APPLICATIONS7.1 HD Audio Interface7.1.1 Multi-Channel StreamsThe CS4207 codec supports multi-channel streams (streams with sample

Página 45 - DS880F4 45

DS880F4 139CS42077.2 Analog InputsThe analog inputs of the CS4207 can be configured as single-ended, pseudo-differential, or fully differentialtopolog

Página 46 - 46 DS880F4

14 DS880F4CS4207ANALOG INPUT CHARACTERISTICS (COMMERCIAL - CNZ)(Test Conditions (unless otherwise specified): Input sine wave (relative to digital ful

Página 47 - 6.4.4 Supported Power States

140 DS880F4CS4207For an improvement from using the single-ended circuitry, both analog stereo input pairs may be configuredin a pseudo-differential to

Página 48 - 6.4.6 Power States

DS880F4 141CS4207For the best ADC performance, fully differential inputs can be connected to the Mic In 1/Line In 2 input paironly. This topology prov

Página 49 - 6.4.8 Converter Format

142 DS880F4CS42077.3 Analog Outputs7.3.1 Output FilterThe Cirrus Application Note titled Design Notes for a 2-Pole Filter with Differential Input, av

Página 50 - 50 DS880F4

DS880F4 143CS42072. set the DMIC1 Enable and/or DMIC2 Enable bit in the Beep Configuration (CIR = 0004h) register ofthe Vendor Processing Widget (Node

Página 51 - 6.4.9 Amplifier Gain/Mute

144 DS880F4CS42078. PCB LAYOUT CONSIDERATIONS8.1 Power Supply, GroundingAs with any high-resolution converter, the CS4207 requires careful attention t

Página 52 - 52 DS880F4

DS880F4 145CS42079. PARAMETER DEFINITIONSDynamic RangeThe ratio of the rms value of the signal to the rms sum of all other spectral components over th

Página 53 - DS880F4 53

146 DS880F4CS420710.QFN PACKAGE DIMENSIONSTHERMAL CHARACTERISTICSDIM MIN NOM MAXA 0.70 0.75 0.80A1 0.00 0.05A3 0.20 BSCb 0.15 0.20 0.25D 6.00 BSCD2 4.

Página 54 - 54 DS880F4

DS880F4 147CS420711.ORDERING INFORMATION12.REFERENCES1. Intel Corporation, High Definition Audio Specification, Revision 1.0, April 15, 2004.http://do

Página 55 - 6.5.5 Connection List Length

148 DS880F4CS4207Contacting Cirrus Logic SupportFor all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find one near

Página 56 - 6.5.6 Supported Power States

DS880F4 15CS4207ANALOG INPUT CHARACTERISTICS (AUTOMOTIVE - DNZ)(Test Conditions (unless otherwise specified): Input sine wave (relative to digital ful

Página 57 - DS880F4 57

16 DS880F4CS4207ADC DIGITAL FILTER CHARACTERISTICS6. Response is clock dependent and will scale with Fs. Parameter (Note 6) Min Typ Max UnitPassband (

Página 58 - 6.5.11 Power States

DS880F4 17CS4207ANALOG OUTPUT CHARACTERISTICS (COMMERCIAL - CNZ)(Test conditions (unless otherwise specified): Input test signal is a full-scale 997 H

Página 59 - 6.5.13 Converter Format

18 DS880F4CS42077. See Figure 3 and Figure 4. RL and CL reflect the recommended minimum resistance and maximum ca-pacitance required for the internal

Página 60 - 60 DS880F4

DS880F4 19CS4207ANALOG OUTPUT CHARACTERISTICS (AUTOMOTIVE - DNZ)(Test conditions (unless otherwise specified): Input test signal is a full-scale 997 H

Página 61 - 6.5.14 Amplifier Gain/Mute

2 DS880F4CS4207Digital Audio Interface Receiver Complete EIAJ CP1201, IEC 60958, S/PDIF Compatible Receiver 32 kHz to 192 kHz Sample Rate Range Aut

Página 62 - 62 DS880F4

20 DS880F4CS42078. See Figure 5 and Figure 6. RL and CL reflect the recommended minimum resistance and maximum ca-pacitance required for the internal

Página 63 - DS880F4 63

DS880F4 21CS4207COMBINED DAC INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE9. Measurement Bandwidth is from Stopband to 100 kHz.DC ELECTRICAL CHAR

Página 64 - 64 DS880F4

22 DS880F4CS4207DIGITAL MICROPHONE INTERFACE CHARACTERISTICSTest conditions: Inputs: Logic 0 = GND = 0 V, Logic 1 = VL_IF; TA = +25 C; CLOAD = 30 pF.

Página 65 - 6.6.6 Connection List Entry

DS880F4 23CS4207DIGITAL INTERFACE SPECIFICATIONS & CHARACTERISTICS14. See “Digital I/O Pin Characteristics” on p 10 for HD Audio I/F and control p

Página 66 - 6.6.7 Power States

24 DS880F4CS4207POWER CONSUMPTION(This table represents the power consumption for individual circuit blocks within the codec) (See (Note 15))15. Unles

Página 67 - 6.6.9 Converter Format

DS880F4 25CS42074. CODEC RESET AND INITIALIZATION4.1 Link ResetA Link Reset is a system controller generated assertion of the HD Audio Bus RESET# sign

Página 68 - 68 DS880F4

26 DS880F4CS4207If RESET# is asserted low, and BITCLK and SYNC are not running at the time (defined as link low powerstate), the codec will signal the

Página 69 - DS880F4 69

DS880F4 27CS4207. Output Path Output Pin Widget D0 Output Pin Widget D3Output Converter Widget D0• Normal Operation in D0• Converter widget continues

Página 70 - 08h, 14h)

28 DS880F4CS42074.6 Power State Settings Reset (PS-SettingsReset)PS-SettingsReset is reported as set to one ‘1’b when, during any low power state tran

Página 71 - DS880F4 71

DS880F4 29CS42074.7 Register Settings Across ResetsThe CS4207 will perform a complete Power On Reset (POR) initialization if the voltage is cycled fro

Página 72 - 6.7.5 Power States

DS880F4 3CS4207TABLE OF CONTENTS1. PIN DESCRIPTIONS ...

Página 73 - DS880F4 73

30 DS880F4CS4207Pin Sense; Presence Detect Bit only.(verb ID = F09/709)Update to reflect proper state and save any Unsolicited Response that has not b

Página 74 - 6.7.7 Converter Format

DS880F4 31CS42075. PRESENCE DETECTION5.1 Jack Detection CircuitThe jack detection circuit provides attachment for to up to four pluggable jacks as des

Página 75 - DS880F4 75

32 DS880F4CS4207If the codec has detected that the link is entering a Link Reset state (see description below), all UnsolicitedResponse requests will

Página 76 - 76 DS880F4

DS880F4 33CS42076. HD AUDIO CODEC SUPPORTED VERBS AND RESPONSES6.1 Software Programming ModelFigure 10. Software Programming ModelHeadphoneSingle-End

Página 77 - DS880F4 77

34 DS880F4CS42076.1.1 Node ID SummaryNode ID Description Reference Section00h Root Node Section 6.2 on page 3601h Audio Function Group Section 6.3 on

Página 78 - 6.8.2 Pin Capabilities

DS880F4 35CS42076.1.2 Pin Configuration Register DefaultsThe Configuration Default Register is required for each Pin Widget. It is used by software as

Página 79 - 6.8.4 Supported Power States

36 DS880F4CS42076.2 Root Node (Node ID = 00h)6.2.1 Vendor and Device IDGet Parameter Command Format:Response Format:6.2.2 Revision IDGet Parameter Com

Página 80 - 6.8.6 Power States

DS880F4 37CS42076.3 Audio Function Group (Node ID = 01h)6.3.1 Subordinate Node CountGet Parameter Command Format:Response Format:6.3.2 Function Group

Página 81 - 6.8.7 Pin Widget Control

38 DS880F4CS42076.3.4 Supported PCM Size, RatesGet Parameter Command Format:Response Format:Bits [31:28] Bits [27:20] Bits [19:8] Bits [7:0]CAd = X No

Página 82 - 82 DS880F4

DS880F4 39CS42076.3.5 Supported Stream FormatsGet Parameter Command Format:Response Format:6.3.6 Supported Power StatesGet Parameter Command Format:Re

Página 83 - 6.8.10 Configuration Default

4 DS880F4CS42076.3.13 Implementation Identification ... 44

Página 84 - 84 DS880F4

40 DS880F4CS4207• Reporting of ClkStopOk when stopping of the clock would be permitted. The CLKSTOP is a static ca-pability with ClkStopOk a dynamic r

Página 85 - DS880F4 85

DS880F4 41CS42076.3.8 Power StatesGet Parameter Command Format:Set Parameter Command Format:Response Format:PS-Set is a Power State field which define

Página 86 - 6.9.3 Connection List Length

42 DS880F4CS4207state for the Audio Function Group node will force all other nodes with power state control to the D3 state.If the Power State field f

Página 87 - 6.9.6 Power States

DS880F4 43CS42076.3.10 GPIO Enable MaskGet Parameter Command Format:Set Parameter Command Format:Response Format:6.3.11 GPIO DirectionGet Parameter Co

Página 88 - 6.9.7 Pin Widget Control

44 DS880F4CS4207Response Format:6.3.13 Implementation IdentificationThis field provides the Board Implementation ID and Assembly ID of the functional

Página 89 - DS880F4 89

DS880F4 45CS42076.4 DAC1, DAC2, DAC3 Output Converter Widgets (Node ID = 02h, 03h, 04h)6.4.1 Audio Widget CapabilitiesGet Parameter Command Format:Res

Página 90 - 6.9.10 EAPD/BTL Enable

46 DS880F4CS42076.4.2 Supported PCM Size, RatesGet Parameter Command Format:Response Format:6.4.3 Supported Stream FormatsGet Parameter Command Format

Página 91 - 6.9.11 Configuration Default

DS880F4 47CS4207Response Format:6.4.4 Supported Power StatesGet Parameter Command Format:Response Format:6.4.5 Output Amplifier CapabilitiesGet Parame

Página 92 - 92 DS880F4

48 DS880F4CS42076.4.6 Power StatesGet Parameter Command Format:Set Parameter Command Format:Response Format:PS-Set is a PowerState field which defines

Página 93 - 6.10.3 Connection List Length

DS880F4 49CS42076.4.7 Converter Stream, ChannelGet Parameter Command Format:Set Parameter Command Format:Response Format:6.4.8 Converter FormatGet Par

Página 94 - 6.10.5 Pin Widget Control

DS880F4 5CS42076.8.7 Pin Widget Control ...

Página 95 - 6.10.6 EAPD/BTL Enable

50 DS880F4CS4207Response Format:Bits [15:0] must be programmed with the same value programmed into the Stream Descriptor, so that thedata format being

Página 96 - 6.10.7 Configuration Default

DS880F4 51CS42076.4.9 Amplifier Gain/MuteGet Parameter Command Format:Bits [19:16] = ‘Bh’, where bits [15:0] are defined below:Response Format:Set Par

Página 97 - DS880F4 97

52 DS880F4CS4207Bits [19:16] = ‘3h’, where bits [15:0] are defined below:Bits Type Default Description15 Write Only xbSet Output Amplifier (SOA): Dete

Página 98 - 98 DS880F4

DS880F4 53CS42076.5 ADC1, ADC2 Input Converter Widgets (Node ID = 05h, 06h)6.5.1 Audio Widget CapabilitiesGet Parameter Command Format:Response Format

Página 99 - 6.11.6 Power States

54 DS880F4CS42076.5.2 Supported PCM Size, RatesGet Parameter Command Format:Response Format:6.5.3 Supported Stream FormatsGet Parameter Command Format

Página 100 - 100 DS880F4

DS880F4 55CS42076.5.4 Input Amplifier CapabilitiesGet Parameter Command Format:Response Format:6.5.5 Connection List LengthGet Parameter Command Forma

Página 101 - DS880F4 101

56 DS880F4CS42076.5.6 Supported Power StatesGet Parameter Command Format:Response Format:6.5.7 ADC1 Connection List EntryGet Parameter Command Format:

Página 102 - 102 DS880F4

DS880F4 57CS4207Response Format:6.5.9 ADC2 Connection List EntryGet Parameter Command Format:Response Format:6.5.10 ADC2 Connection Select ControlGet

Página 103 - 6.11.10 Pin Sense

58 DS880F4CS42076.5.11 Power StatesGet Parameter Command Format:Set Parameter Command Format:Response Format:PS-Set is a PowerState field which define

Página 104 - 104 DS880F4

DS880F4 59CS42076.5.12 Converter Stream, ChannelGet Parameter Command Format:Set Parameter Command Format:Response Format:6.5.13 Converter FormatGet P

Página 105 - DS880F4 105

6 DS880F4CS42076.13.7 Pin Sense ...

Página 106 - 6.11.14 Amplifier Gain/Mute

60 DS880F4CS4207If the TYPE is set to Non-PCM, the controller pushes data over the link and is not concerned with format-ting. The base rate, data typ

Página 107 - DS880F4 107

DS880F4 61CS42076.5.14 Amplifier Gain/MuteGet Parameter Command Format:Bits [19:16] = ‘Bh’, where bits [15:0] are defined below:Response Format:Set Pa

Página 108 - 108 DS880F4

62 DS880F4CS420713 Write Only xbSet Left Amplifier (SLA): Selects the left chan-nel (channel 0). A 1 indicates that the relevant amplifier should acce

Página 109 - 6.12.2 Pin Capabilities

DS880F4 63CS42076.6 S/PDIF Receiver Input Converter Widget (Node ID = 07h)6.6.1 Audio Widget CapabilitiesGet Parameter Command Format:Response Format:

Página 110 - 6.12.4 Pin Widget Control

64 DS880F4CS42076.6.2 Supported PCM Size, RatesGet Parameter Command Format:Response Format:6.6.3 Supported Stream FormatsGet Parameter Command Format

Página 111 - DS880F4 111

DS880F4 65CS42076.6.4 Connection List LengthGet Parameter Command Format:Response Format:6.6.5 Supported Power StatesGet Parameter Command Format:Resp

Página 112 - 6.12.7 Amplifier Gain/Mute

66 DS880F4CS42076.6.7 Power StatesGet Parameter Command Format:Set Parameter Command Format:Response Format:PS-Set is a PowerState field which defines

Página 113 - DS880F4 113

DS880F4 67CS42076.6.8 Converter Stream, ChannelGet Parameter Command Format:Set Parameter Command Format:Response Format:6.6.9 Converter FormatGet Par

Página 114 - 114 DS880F4

68 DS880F4CS420714 Read/Write 0bSample Base Rate (BASE):0 = 48 kHz1 = 44.1 kHz13:11 Read/Write 000bSample Base Rate Multiple (MULT):000 = 48 kHz/44.1

Página 115 - 6.13.3 Supported Power States

DS880F4 69CS42076.6.10 Digital Converter ControlGet Parameter Command Format:** Note: Address F0Eh is not supported. Set Parameter Command Format:Resp

Página 116 - 6.13.4 Power States

DS880F4 7CS4207LIST OF FIGURESFigure 1.Typical Connection Diagram - Desktop System ...

Página 117 - 6.13.5 Pin Widget Control

70 DS880F4CS42076.7 S/PDIF Transmitter 1, S/PDIF Transmitter 2 Output Converter Widgets (Node ID = 08h, 14h)6.7.1 Audio Widget CapabilitiesGet Paramet

Página 118 - 6.13.7 Pin Sense

DS880F4 71CS42076.7.2 Supported PCM Size, RatesGet Parameter Command Format:Response Format:Bits [31:28] Bits [27:20] Bits [19:8] Bits [7:0]CAd = XS/P

Página 119 - 6.13.8 Configuration Default

72 DS880F4CS42076.7.3 Supported Stream FormatsGet Parameter Command Format:Response Format:6.7.4 Supported Power StatesGet Parameter Command Format:Re

Página 120 - 120 DS880F4

DS880F4 73CS4207Response Format:PS-Set is a PowerState field which defines the current power setting of the referenced node. Since thisnode is of type

Página 121 - 6.14.3 Connection List Length

74 DS880F4CS42076.7.6 Converter Stream, ChannelGet Parameter Command Format:Set Parameter Command Format:Response Format:6.7.7 Converter FormatGet Par

Página 122 - 122 DS880F4

DS880F4 75CS4207Bits Type Default Description31:16 Read Only 0000h Reserved15 Read/Write 0bStream Type (TYPE): If TYPE is non-zero, the other bits in

Página 123 - 6.14.6 Pin Widget Control

76 DS880F4CS42076.7.8 Digital Converter ControlGet Parameter Command Format:** Note: Address F0Eh is not supported. Set Parameter Command Format:Respo

Página 124 - 124 DS880F4

DS880F4 77CS42072 Read/Write 0bVCFG (Validity Config.): Determines S/PDIF transmitter behavior when data is not being transmitted. When asserted, this

Página 125 - DS880F4 125

78 DS880F4CS42076.8 Headphone Pin Widget (Node ID = 09h)6.8.1 Audio Widget CapabilitiesGet Parameter Command Format:Response Format:6.8.2 Pin Capabili

Página 126 - 126 DS880F4

DS880F4 79CS42076.8.3 Connection List LengthGet Parameter Command Format:Response Format:6.8.4 Supported Power StatesGet Parameter Command Format:Resp

Página 127 - 6.15.4 Coefficient Index

8 DS880F4CS42071. PIN DESCRIPTIONS1.1 CS4207 48-pin QFN Pinout:Pin Name QFN Pin DescriptionVL_IF 1Digital Interface Signal Level (Input) - Digital sup

Página 128 - 6.15.6 Coefficient Registers

80 DS880F4CS42076.8.5 Connection List EntryGet Parameter Command Format:Response Format:6.8.6 Power StatesGet Parameter Command Format:Set Parameter C

Página 129 - DS880F4 129

DS880F4 81CS4207PS-Set is a PowerState field which defines the current power setting of the referenced node. Since thisnode is of type other than an A

Página 130 - 130 DS880F4

82 DS880F4CS4207Response Format:6.8.8 Unsolicited Response ControlGet Parameter Command Format:Set Parameter Command Format:Response Format: Bits [31:

Página 131 - DS880F4 131

DS880F4 83CS42076.8.9 Pin SenseGet Parameter Command Format:Set Parameter Command Format:Get Response Format:Pin Sense Execute Format:6.8.10 Configura

Página 132 - 132 DS880F4

84 DS880F4CS4207Bits [31:0] are sticky and will not be reset by a Link Reset or a CODEC Reset:Bits Type Default Description31:30 Read/Write 00bPort Co

Página 133 - DS880F4 133

DS880F4 85CS42076.9 Line Out 1 Pin Widget (Node ID = 0Ah)6.9.1 Audio Widget CapabilitiesGet Parameter Command Format:Response Format:Bits [31:28] Bits

Página 134 - 134 DS880F4

86 DS880F4CS42076.9.2 Pin CapabilitiesGet Parameter Command Format:Response Format:6.9.3 Connection List LengthGet Parameter Command Format:Response F

Página 135 - DS880F4 135

DS880F4 87CS42076.9.4 Supported Power StatesGet Parameter Command Format:Response Format:6.9.5 Connection List EntryGet Parameter Command Format:Respo

Página 136 - 136 DS880F4

88 DS880F4CS4207Response Format:PS-Set is a PowerState field which defines the current power setting of the referenced node. Since thisnode is of type

Página 137 - DS880F4 137

DS880F4 89CS4207Response Format:6.9.8 Unsolicited Response ControlGet Parameter Command Format:Set Parameter Command Format:Response Format: Bits [31:

Página 138 - 7. APPLICATIONS

DS880F4 9CS4207RESET# 11 Reset (Input) - The device enters a low power mode when this pin is driven low. GPIO1/DMIC_SDA2/SPDIF_OUT212General Purpose I

Página 139 - 7.2 Analog Inputs

90 DS880F4CS42076.9.9 Pin SenseGet Parameter Command Format:Set Parameter Command Format:Get Response Format:Pin Sense Execute Format:6.9.10 EAPD/BTL

Página 140 - 140 DS880F4

DS880F4 91CS42076.9.11 Configuration DefaultThe Configuration Default register is used by software as an aid in determining the configuration of jacks

Página 141 - DS880F4 141

92 DS880F4CS42076.10 Line Out 2 Pin Widget (Node ID = 0Bh)6.10.1 Audio Widget CapabilitiesGet Parameter Command Format:Response Format:Bits [31:28] Bi

Página 142 - 7.4 Digital Mic Inputs

DS880F4 93CS42076.10.2 Pin CapabilitiesGet Parameter Command Format:Response Format:6.10.3 Connection List LengthGet Parameter Command Format:Response

Página 143 - 7.5.1 S/PDIF Receiver SRC

94 DS880F4CS42076.10.4 Connection List EntryGet Parameter Command Format:Response Format:6.10.5 Pin Widget ControlGet Parameter Command Format:Set Par

Página 144 - 8. PCB LAYOUT CONSIDERATIONS

DS880F4 95CS42076.10.6 EAPD/BTL EnableGet Parameter Command Format:Set Parameter Command Format:Get Response Format:Bits [31:28] Bits [27:20] Bits [19

Página 145 - 9. PARAMETER DEFINITIONS

96 DS880F4CS42076.10.7 Configuration DefaultThe Configuration Default register is used by software as an aid in determining the configuration of jacks

Página 146 - THERMAL CHARACTERISTICS

DS880F4 97CS42076.11 Line In 1/Mic In 2, Mic In 1/Line In 2 Pin Widgets (Node ID = 0Ch, 0Dh)6.11.1 Audio Widget CapabilitiesGet Parameter Command Form

Página 147 - 13.REVISION HISTORY

98 DS880F4CS42076.11.3 Mic In 1/Line In 2 Pin CapabilitiesGet Parameter Command Format:Response Format:15:8 Read Only 00hVREF Control (VREFC): VREF ge

Página 148 - 148 DS880F4

DS880F4 99CS42076.11.4 Input Amplifier CapabilitiesGet Parameter Command Format:Response Format:6.11.5 Supported Power StatesGet Parameter Command For

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