Cirrus-logic CDB4270 Manual do Utilizador descarregar pdf (Página 28)

28 DS686DB3

CDB4270

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Figure 17. 48 kHz, Frequency Response Figure 18. 48 kHz, Crosstalk

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Figure 19. FFT (-1 dB 96 kHz) Figure 20. FFT (-60 dB, 96 kHz)

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Figure 21. FFT (96 kHz, No Input) Figure 22. 96 kHz, THD+N vs. Input Freq

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Evaluation Board for CS4270 1
TABLE OF CONTENTS 2
LIST OF FIGURES 3
LIST OF TABLES 4
1.7 Canned Oscillator 6
1.8 External Control Headers 6
1.9 Analog Input 6
DS686DB3 7 7
1.10 Analog Outputs 8
1.11 Control Port 8
1.12 Hardware Mode Switches 8
2. FPGA OVERVIEW 9
2.1 FPGA Architecture 9
2.3 Internal Data Routing 10
2.4 Internal Drivers 11
2.5 External MCLK Control 12
3.2 CDB4270 GUI 14
16 DS686DB3 16
DS686DB3 17 17
4. HARDWARE MODE 18
Function: 19
DS686DB3 19 19
5.3.2 MCLK Source (Bit 4) 20
*Default factory settings 26
8. ADC PERFORMANCE PLOTS 27
28 DS686DB3 28
DS686DB3 29 29
30 DS686DB3 30
9. DAC PERFORMANCE PLOTS 31
32 DS686DB3 32
DS686DB3 33 33
34 DS686DB3 34
DS686DB3 35 35
10.CDB BLOCK DIAGRAM 36
11.CDB SCHEMATICS 37
38 DS686DB3 38
DS686DB3 39 39
40 DS686DB3 40
DS686DB3 41 41
42 DS686DB3 42
DS686DB3 43 43
44 DS686DB3 44
DS686DB3 45 45
12.CDB LAYOUT 46
DS686DB3 47 47
48 DS686DB3 48
DS686DB3 49 49
14.REVISION HISTORY 50

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Cirrus-logic CDB4270 Manual do Utilizador Página 28

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