Cirrus-logic CS8952 Manual do Utilizador Página 1

Copyright © Cirrus Logic, Inc. 2007(All Rights Reserved)http://www.cirrus.comFeaturesz Single-Chip IEEE 802.3 Physical Interface IC for 100BASE-TX, 10

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 10DS206F1100BASE-TX MII TRANSMIT TIMING - 4B/5B ALIGN MODES Parameter Symbol Min Typ Max UnitTXD[

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 11DS206F1100BASE-TX MII TRANSMIT TIMING - 5B BYPASS ALIGN MODE Parameter Symbol Min Typ Max UnitT

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 12DS206F110BASE-T MII RECEIVE TIMING Parameter Symbol Min Typ Max UnitRX_CLK Period tP-400-nsRX_C

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 13DS206F110BASE-T MII TRANSMIT TIMING Parameter Symbol Min Typ Max UnitTXD[3:0] Setup to TX_CLK H

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 14DS206F110BASE-T SERIAL RECEIVE TIMING Parameter Symbol Min Typ Max UnitRX+/- active to RXD[0] a

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 15DS206F110BASE-T SERIAL TRANSMIT TIMING Parameter Symbol Min Typ Max UnitTX_EN Setup from TX_CLK

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 16DS206F1AUTO NEGOTIATION / FAST LINK PULSE TIMING Parameter Symbol Min Typ Max UnitFLP burst to

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 17DS206F1SERIAL MANAGEMENT INTERFACE TIMING Parameter Symbol Min Typ Max UnitMDC Period tp60 - -

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 18DS206F12. INTRODUCTIONThe CS8952 is a complete physical-layer transceiv-er for 100BASE-TX and 1

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 19DS206F1VSS18 RES VSS174.99 kΩ25 MHzXTAL_I XTAL_O33 ΩMDIO33 Ω33 Ω33 Ω33 Ω33 Ω33 ΩMDCTXDTX_ER/TXD

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 2DS206F1TABLE OF CONTENTS1. SPECIFICATIONS AND CHARACTERISTICS...

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 20DS206F1rupt signal to the controller when a change of statehas occurred in the CS8952, eliminat

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 21DS206F1Table 2. 4B5B Symbol Encoding/Decoding2 10100 00103 10101 00114 01010 01005 01011 01016

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 22DS206F1Table 3. 4B5B Code Violation Decoding3.1.1.2 100 Mb/s LoopbackOne of two internal 100BA

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 23DS206F1RX_CLK, RX_DV, COL, and CRS) onto a shared,external repeater system bus. 3.1.3 10BASE-T

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 24DS206F1Manchester Encoder and Decoder. Selection ismade via:- setting bit 14 in the Basic Mode

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 25DS206F1Auto-Negotiation encapsulates information withina burst of closely spaced Link Integrity

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 26DS206F1STATUS Pins- COL - Collision indication, valid only forhalf duplex modes.- CRS - Carrier

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 27DS206F1onto RXD[3:0] synchronously with respect toRX_CLK.Receive errors are indicated during fr

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 28DS206F1specification, while the remaining registers provideenhanced monitoring and control capa

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 29DS206F1A read transaction is indicated by an Opcode of 10and a write by 01.The PHY Address is f

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 3DS206F11. SPECIFICATIONS AND CHARACTERISTICSABSOLUTE MAXIMUM RATINGS (AVSS, DVSS = 0 V, all volt

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 30DS206F16. CS8952 REGISTERSThe CS8952 register set is comprised of the 16-bitstatus and control

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 31DS206F16.1 Basic Mode Control Register - Address 00h 15 14 13 12 11 10 9 8Software ResetLoopbac

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 32DS206F19 Restart Auto-Neg Read/Set 0 Setting this bit causes auto-negotiation to be restarted.

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 33DS206F16.2 Basic Mode Status Register - Address 01h 15 14 13 12 11 10 9 8100BASE-T4100BASE-TX/

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 34DS206F13 Auto-Neg Ability Read Only 1 This bit indicates that the CS8952 has auto-negotia-tion

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 35DS206F16.3 PHY Identifier, Part 1 - Address 02h 15 14 13 12 11 10 9 8Organizationally Unique Id

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 36DS206F16.4 PHY Identifier, Part 2 - Address 03h 15 14 13 12 11 10 9 8Organizationally Unique Id

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 37DS206F16.5 Auto-Negotiation Advertisement Register - Address 04h 15 14 13 12 11 10 9 8Next Page

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 38DS206F16.6 Auto-Negotiation Link Partner Ability Register - Address 05h 15 14 13 12 11 10 9 8Ne

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 39DS206F16.7 Auto-Negotiation Expansion Register - Address 06h 15 14 13 12 11 10 9 8Reserved76543

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 4DS206F1DC CHARACTERISTICS (Over recommended operating conditions)Parameter Symbol Min Typ Max

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 40DS206F16.8 Auto-Negotiation Next-Page Transmit Register - Address 07h 15 14 13 12 11 10 9 8Next

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 41DS206F16.9 Interrupt Mask Register - Address 10h This register indicates which events will caus

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 42DS206F111 DCR Rollover Read/Write 0 When set, an interrupt will be generated if the MSB in the

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 43DS206F15 Auto-Neg Complete Read/Write 0 When set, an interrupt will be generated once auto-nego

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 44DS206F16.10 Interrupt Status Register - Address 11h This register indicates which event(s) caus

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 45DS206F18 Remote Loopback FaultRead Only 0 When set, this bit indicates that the Elastic Buffer

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 46DS206F12 Remote Fault Read Only 0 When auto-negotiation is enabled, this bit is set if the Remo

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 47DS206F16.11 Disconnect Count Register - Address 12h 15 14 13 12 11 10 9 8Disconnect Counter7654

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 48DS206F16.12 False Carrier Count Register - Address 13h 15 14 13 12 11 10 9 8False Carrier Count

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 49DS206F16.13 Scrambler Key Initialization Register - Address 14h 15 14 13 12 11 10 9 8Load Reser

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 5DS206F1Notes: 1. With digital outputs connected to CMOS loads.Output High Voltage (MII_DRV = 0)C

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 50DS206F16.14 Receive Error Count Register - Address 15h 15 14 13 12 11 10 9 8Receive Error Count

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 51DS206F16.15 Descrambler Key Initialization Register - Address 16h 15 14 13 12 11 10 9 8Load Res

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 52DS206F16.16 PCS Sub-Layer Configuration Register - Address 17h 15 14 13 12 11 10 9 8NRZI Enable

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 53DS206F19MF Preamble EnableRead/Write 0 When set, this bit will force all management frames (via

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 54DS206F13 Rx Disable Read/Write 0 When set, the receiver is disabled and no incoming packets pas

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 55DS206F16.17 Loopback, Bypass, and Receiver Error Mask Register - Address 18h 15 14 13 12 11 10

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 56DS206F18 PMD Loopback Read/Write 0 When set, the scrambled NRZI transmit data is con-nected dir

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 57DS206F12 Link Error Report EnableRead/Write 0 When set, this bit causes link errors to be repor

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 58DS206F16.18 Self Status Register - Address 19h 15 14 13 12 11 10 9 8Link OKPowerDownReceivingDa

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 59DS206F15 CIM Status Read Only 0 When clear, this bit indicates that a stable link con-nection h

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 6DS206F110BASE-T CHARACTERISTICS Parameter Symbol Min Typ Max Unit10BASE-T InterfaceTransmitter

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 60DS206F16.19 10BASE-T Status Register - Address 1Bh 15 14 13 12 11 10 9 8Reserved Polarity OK10B

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 61DS206F16.20 10BASE-T Configuration Register - Address 1Ch 15 14 13 12 11 10 9 8Reserved76543210

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 62DS206F17. DESIGN CONSIDERATIONSThe CS8952 is a mixed-signal device containingthe high-speed dig

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 63DS206F1TX_NRZ+/- termination components should beplaced as close to the fiber transceiver as po

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 64DS206F1plied through the XTAL_I pin, or using an externalclock source supplied through the TX_C

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 65DS206F17.7 General Layout RecommendationsThe following PCB layout recommendations willhelp ensu

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 66DS206F1ly) on both sides of the TX+/- traces.• No signal current carrying planes, i.e. noground

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 67DS206F18. PIN DESCRIPTIONSPin DiagramVSSVDDVSSTX_NRZ-TX_NRZ+RX_NRZ-RX_NRZ+SIGNAL-SIGNAL+VSSVDDV

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 68DS206F1MII Interface PinsCOL/PHYAD0 - Collision Detect/PHY Address 0. Input/Tri-State Output, P

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 69DS206F1In order to conform with Annex 22B of the IEEE 802.3u specification, the MII_DRV pin sho

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 7DS206F1100BASE-X CHARACTERISTICS Parameter Symbol Min Typ Max Unit100BASE-TX TransmitterTX Diff

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 70DS206F1RX_ER/PHYAD4/RXD4 - Receive Error/PHY Address 4/Receive Data 4. Input/Tri-State Output,

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 71DS206F1When the TCM pin is high on power-up or reset, the CLK25 pin may be used as a source for

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 72DS206F1Auto-Negotiation may also be enabled and the advertised capabilities modified under soft

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 73DS206F1BP4B5B - Bypass 4B5B Coders. Input, Pin 56.When driven high during power-up or reset, th

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 74DS206F1ISODEF - Isolate Default. Input, Pin 63.When asserted high during power-up or reset, the

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 75DS206F1LPSTRT - Low Power Start. Input, Pin 50.When this active-low input is asserted during po

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 76DS206F1REPEATER - REPEATER Mode Select. Input, Pin 16.This pin controls the operation of the CR

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 77DS206F1TXSLEW[1:0] - Transmit Slew Rate Control. Input, Pins 61 and 60.These three-level pins a

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 78DS206F1RESET - Reset. Input, Pin 15.This active high input initializes the CS8952, and causes t

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 79DS206F19. PACKAGE DIMENSIONS.INCHES MILLIMETERSDIM MIN MAX MIN MAXA --- 0.063 --- 1.60A1 0.002

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 8DS206F1100BASE-TX MII RECEIVE TIMING - 4B/5B ALIGNED MODES Parameter Symbol Min Typ Max UnitRX_C

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 80DS206F110.ORDERING INFORMATION11.ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 81DS206F112.REVISION HISTORY Revision Date ChangesPP3 OCT 2001 Initial Release.F1 JAN 2007 Added

CS8952CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 9DS206F1100BASE-TX MII RECEIVE TIMING - 5B BYPASS ALIGN MODE Parameter Symbol Min Typ Max UnitRX_