Cirrus-logic CS5374 Manual do Utilizador

Consulte online ou descarregue Manual do Utilizador para Hardware Cirrus-logic CS5374. Cirrus Logic CS5374 User Manual Manual do Utilizador

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Copyright Cirrus Logic, Inc. 2010
(All Rights Reserved)
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
Dual High-performance Amplifier &
ΔΣ
Modulator
Features
High Input Impedance Differential Amplifier
Ultra-low input bias: < 1 pA
Max signal amplitude: 5 Vpp differential
Fourth Order Delta-Sigma (ΔΣ) Modulator
Signal Bandwidth: DC to 2 kHz
Common mode rejection: 110 dB CMRR
Differential Analog Input, Digital ΔΣ Output
Multiplexed inputs: INA, INB, 800Ω termination
Selectable Gain: 1x, 2x, 4x, 8x, 16x, 32x, 64x
Excellent Amplifier Noise Performance
•1.5 μVpp between 0.1 Hz and 10 Hz
11 nV /
Hz from 200 Hz to 2 kHz
High Modulator Dynamic Range
126 dB SNR @ 215 Hz BW (2 ms sampling)
123 dB SNR @ 430 Hz BW (1 ms sampling)
Low Total Harmonic Distortion
–118 dB THD typical (0.000126%)
–108 dB THD maximum (0.0004%)
Low Power Consumption
Normal operation: 6.5 mA per channel
Power down: 15 μA per channel max
Dual Power Supply Configuration
VA+ = +2.5 V; VA– = –2.5 V; VD = +3.3 V
Description
The CS5374 combines two marine seismic analog mea-
surement channels into one 7 mm x 7 mm QFN
package. Each measurement channel consists of a high
input impedance programmable gain differential amplifi-
er that buffers analog signals into a high-performance,
fourth-order ΔΣ modulator. The low-noise ΔΣ modulator
converts the analog signal into a one-bit serial bit stream
suitable for the CS5376A digital filter.
Each amplifier has two sets of external inputs, INA and
INB, to simplify system design as inputs from a hydro-
phone sensor or the CS4373A test DAC. An internal
800Ω termination can also be selected for noise tests.
Gain settings are binary weighted (1x, 2x, 4x, 8x, 16x,
32x, 64x) and match the CS4373A test DAC output at-
tenuation settings for full-scale testing at all gain ranges.
Both the input multiplexer and gain are set by registers
accessed through a standard SPI™ port.
Each fourth-order ΔΣ modulator has very high dynamic
range combined with low total harmonic distortion and
low power consumption. It converts differential analog
signals from the amplifier to an oversampled ΔΣ serial bit
stream which is decimated by the CS5376A digital filter
to a 24-bit output at the final output word rate.
ORDERING INFORMATION
See page 43.
INA1+
INB1+
MUX1
MUX2
INB1-
INA1-
GUARD1
+
-
-
+
400 Ω 400 Ω
INA2+
INB2+
INB2-
INA2-
+
-
-
+
400 Ω 400 Ω
Reset, Clock,
and
Synchronization
INR1- VA+
MFLAG1
MCLK
MSYNC
MFLAG2
MDATA2
GAIN1GAIN2
GUARD2 INR2- INR2+
4
th
Order
Modulator
4
th
Order
Modulator
INF1- INF1+INR1+
RST
SPI
TM
Serial
Interface
SDI
SDO
SCLK
CS
INF2+INF2-OUT2-OUT2+
OUT1+ OUT1-
CS5374
VA-
GND
VD
VREF-VREF+
VA+
VA-
MDATA1
SEP '10
DS862F2
CS5374
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Resumo do Conteúdo

Página 1 - Modulator

Copyright  Cirrus Logic, Inc. 2010(All Rights Reserved)Preliminary Product InformationThis document contains information for a new product. Cirrus Lo

Página 2 - TABLE OF CONTENTS

CS5374CS537410DIGITAL CHARACTERISTICS Notes: 21. Device is intended to be driven with CMOS logic levels.22. Guaranteed by design and/or characterizati

Página 3 - LIST OF TABLES

CS5374CS537411DIGITAL CHARACTERISTICS (CONT.) Notes: 23. MCLK is generated by the CS5376A digital filter. If MCLK is disabled, the CS5374 device autom

Página 4 - ABSOLUTE MAXIMUM RATINGS

CS5374CS537412SPI™ INTERFACE TIMING (EXTERNAL MASTER) Parameter Symbol Min Typ Max UnitSDI Write TimingCS Enable to Valid Latch Clock t160 - - nsDat

Página 5 - ANALOG CHARACTERISTICS

CS5374CS537413POWER SUPPLY CHARACTERISTICS Notes: 26. All outputs unloaded. Digital inputs forced to VD or GND respectively. Amplifier inputs connecte

Página 6 - AMPLIFIER

CS5374CS5374142. GENERAL DESCRIPTIONThe CS5374 combines two marine seismic analogmeasurement channels into one 7 mm x 7 mm QFNpackage. Each measuremen

Página 7 - PERFORMANCE SPECIFICATIONS

CS5374CS537415Figure 11. CS5374 Connection DiagramAINA1+INA1-MUX1MUX2INB1-INB1+GUAR D1+--+400 Ω 400 ΩINB2+INB2-INA2-INA2++--+400 Ω 400 ΩReset, Clock,

Página 8

CS5374CS5374163. AMPLIFIER OPERATIONThe CS5374 high-impedance, low-noise CMOSdifferential input, differential output amplifiers areoptimized for preci

Página 9 - CHANNEL PERFORMANCE PLOTS

CS5374CS537417selected differential input signal, and will vary asthe signal common mode varies. The GUARD out-put will not drive a significant load,

Página 10 - DIGITAL CHARACTERISTICS

CS5374CS5374184. MODULATOR OPERATIONThe CS5374 modulators are fourth-order ΔΣ typeoptimized for extremely high-resolution measure-ment of signals betw

Página 11 - (Note 25)MDAT

CS5374CS5374194.2 Modulator Inputs — INR, INFThe modulator analog inputs are separated into dif-ferential rough and fine signals (INR±, INF±) tomaximi

Página 12 - MSB MSB - 1 LSB

CS5374CS53742TABLE OF CONTENTS1. CHARACTERISTICS AND SPECIFICATIONS ... 4SPECIFIED

Página 13 - POWER SUPPLY CHARACTERISTICS

CS5374CS537420offset and the modulator internal offset are re-moved from the final conversion result.4.4 Modulator Stability — MFLAGThe CS5374 ΔΣ modu

Página 14 - shows connection dia

CS5374CS5374215. SPITM SERIAL PORTThe CS5374 SPI interface is a slave serial port de-signed to interface with the CS5376A SPI 2 port.SPI commands from

Página 15

CS5374CS537422SCLKSDIFigure 16. CS5374 (Slave) Serial Transactions with CS5376A (Master)CSSDOCycleSDI0x02 ADDR DATASDOSDISDOCS5374 SPI Write from CS5

Página 16 - 3. AMPLIFIER OPERATION

CS5374CS5374235.3 SPI RegistersThe CS5374 SPI registers are 8-bit registers thatcontrol the CS5374 hardware configuration. See“SPITM Register Summary”

Página 17 - 3.3 Differential Signals

CS5374CS5374245.3.4 ADCCFG — 0x03The ADCCFG register can disable modulatorOFST and enable HP mode. It also enables PWDNmode for the channel 1 & 2

Página 18 - 4. MODULATOR OPERATION

CS5374CS5374255.5 Example: CS5374 Configuration by the CS5376A SPI 2 PortThe CS5374 SPI port was designed to connect tothe CS5376A secondary SPI 2 por

Página 19 - 4.3.2 Decimated 24-bit Output

CS5374CS537426The SPI2DAT register is 24-bits wide and can con-tain up to three bytes of data to follow the SPI op-code and address. For configuring t

Página 20

CS5374CS537427Transaction CS5376A Primary SPI 1 Write Description01 MOSI: 02 | 03 | 00 00 01 | 00 00 11 | 00 02 02MISO: ----------------------

Página 21 - SERIAL PORT

CS5374CS537428Table 8. Example CS5376A SPI 1 Transactions to Write the CS5374 PWRCFG RegisterTransaction CS5376A Primary SPI 1 Write Description01 MOS

Página 22 - SPI2DAT[23:16]

CS5374CS5374296. POWER MODESThe CS5374 amplifiers and modulators have threepower modes. Normal operation, power down withMCLK enabled, and power down

Página 23 - 5.3 SPI Registers

CS5374CS537438.4 PCB Layers and Routing... 338.5 Power Sup

Página 24 - SPI Read Transactions

CS5374CS5374307. VOLTAGE REFERENCEThe CS5374 modulators require a 2.500 V preci-sion voltage reference to be supplied to the VREF±pins.7.1 VREF Power

Página 25 - SPI2 Registers

CS5374CS5374311 / [(2.048 MHz) x (15 pF)] = 32 kΩ. While thesize of the internal capacitor is fixed, the voltagereference input impedance can vary wit

Página 26

CS5374CS5374328. POWER SUPPLIESThe CS5374 has two positive analog power supplypins (VA+), two negative analog power supplypins (VA–), a digital power

Página 27

CS5374CS537433regulator output, with additional power supplybulk capacitance placed among the analog compo-nent route if space permits.8.4 PCB Layers

Página 28

CS5374CS5374349. SPITM REGISTER SUMMARYThe CS5374 Configuration Registers containthe hardware configuration settings.Name Addr. Type # Bits Descriptio

Página 29 - 6. POWER MODES

CS5374CS5374359.1 VERSION: 0x00(MSB)7654321(LSB)0VER7 VER6 VER5 VER4 VER3 VER2 VER1 VER0RRRRRRRR01000001Figure 20. Hardware Version ID Register VERSI

Página 30 - ± as a differential pair

CS5374CS5374369.2 AMP1CFG: 0x01(MSB)7654321(LSB)0PWDN1 HP1 MUX1_1 MUX1_0 GUARD GAIN1_2 GAIN1_1 GAIN1_0R/W R/W R/W R/W R/W R/W R/W R/W00000000Figure 21

Página 31 - ± pins, and all CS5374

CS5374CS5374379.3 AMP2CFG: 0x02(MSB)7654321(LSB)0PWDN2 HP2 MUX2_1 MUX2_0 --- GAIN2_2 GAIN2_1 GAIN2_0R/W R/W R/W R/W R/W R/W R/W R/W00000000Figure 22.

Página 32 - 8. POWER SUPPLIES

CS5374CS5374389.4 ADCCFG: 0x039.5 PWRCFG: 0x04(MSB)7654321(LSB)0OFSTHP PWDN2 PWDN1 --- --- --- ---R/W R/W R/W R/W R/W R/W R/W R/W00000000Figure 23. M

Página 33 - 8.7 DC-DC Converters

CS5374CS537439(MSB)7654321(LSB)0adc_lpwr --- amp_i1_1 amp_i1_0 rough i1_tail amp_i5_1 amp_i5_0R/W R/W R/W R/W R/W R/W R/W R/W00000000Figure 24. Power

Página 34 - REGISTER SUMMARY

CS5374CS537441. CHARACTERISTICS AND SPECIFICATIONS• Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions.

Página 35 - 01000001

CS5374CS53744010. PIN DESCRIPTIONS PinNamePinNumberPinTypePinDescriptionPower SuppliesVA+VA–6, 397, 40IAnalog power supply. Refer to the Specifie

Página 36 - 00000000

CS5374CS537441Differential Amplifier Analog OutputsOUT1–,OUT1+4647OChannel 1 differential analog output.GUARD1 48 OGuard output voltage for analog inp

Página 37

CS5374CS53744211. PACKAGE DIMENSIONS 48-PIN QFN (7MM X 7MM)

Página 38

CS5374CS53744312. ORDERING INFORMATION 13. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL (Moisture Sensitivity Level) as specified byI

Página 39

CS5374CS53744414. REVISION HISTORY Revision Date ChangesT1 AUG 2008 Initial release of Target data sheet.A1 DEC 2008 Initial release of Advanced dat

Página 40 - 10. PIN DESCRIPTIONS

CS5374CS53745THERMAL CHARACTERISTICS ANALOG CHARACTERISTICS Notes: 7. Common mode signals pass through the differential amplifier architecture and are

Página 41

CS5374CS53746ANALOG CHARACTERISTICS (CONT.) Notes: 9. The upper bandwidth limit is determined by the selected digital filter cut-off frequency.10. An

Página 42 - 48-PIN QFN (7MM X 7MM)

CS5374CS53747PERFORMANCE SPECIFICATIONS Notes: 12. Dynamic Range defined as 20 log [(RMS full scale) / (RMS idle noise)] where idle noise is measure

Página 43 - 12. ORDERING INFORMATION

CS5374CS53748PERFORMANCE SPECIFICATIONS (CONT.) Notes: 14. Channel Gain is the nominal full-scale 24-bit output code from the CS5376A digital filter f

Página 44 - 14. REVISION HISTORY

CS5374CS53749CHANNEL PERFORMANCE PLOTS Figure 3. CS5374 Noise Performance (1x Gain)Figure 4. CS5374 + CS4373A Test DAC Dynamic Performance

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