Cirrus-logic CS4955 Manual do Utilizador descarregar pdf (Página 28)

CS4954 CS4955

28 DS278F6

tions of GPIO_DATA_REG when it detects regis-

ter address 0×0A through the I²C interface. A

detection of address 0×0A can happen in two ways.

The first and most common way this will happen is

when address 0×0A is written to the CS4954/5 via

its I²C interface. The second method for detecting

address 0×0A is implemented by accessing register

address 0×09 through I²C. In I²C host interface op-

eration, the CS4954/5 register address pointer will

auto-increment to address 0×0A after an address

0×09 access.

The GPIO port PDAT [7:0] pins are configured for

output operation when the corresponding

GPIO_CTRL_REG [7:0] bits are set. In GPIO out-

put mode, the CS4954/5 will output the data in

GPIO_DATA_REG [7:0] bit locations onto the

corresponding PDAT [7:0] pins when it detects a

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Cirrus-logic CS4955 Manual do Utilizador Página 28