Cirrus-logic CS4953xx Manual do Utilizador descarregar pdf (Página 66)

Description of Digital Audio Input Port when Configured for DSD Input

CS4953xx Hardware User’s Manual

Figure 6-1. DSD Port Block Diagram

§§

DSD_DATA0

DMA to Peripheral Bus

DSD0

DSD_DATA1

DSD1

DSD_DATA2

DSD2

DSD_DATA3

DSD3

DSD_DATA4

DSD_CLK

DSD4

DSD_DATA5

DSD5

1 2 ... 61 62 63 64 65 66 67 68 69 70 71 ... 117 118

CS4953xx 1
Contents 3
Chapter 1 9
Introduction 9
1.1 Overview 9
1.2.1 DSP Core 11
1.2.3 Debug Controller (DBC) 11
1.2.11 SDRAM Controller 13
1.2.12 Flash Controller 13
1.2.13 DMA Controller 13
1.2.14 Timers 13
1.2.15 Clock Manager and PLL 14
Chapter 2 15
Operational Modes 15
2.1 Overview 15
Master Boot 16
2.3 Slave Boot Procedures 18
Slave Boot Procedures 19
2.3.2 Slave Boot 21
2.3.3 Boot Messages 24
2.3.3.5 Soft Reset 26
Master Boot Procedure 27
2.5 Softboot 28
2.5.2 Softboot Procedure 29
2.5.2.2 Softboot Example 30
Softboot 31
Chapter 3 33
Serial Control Port 33
3.1 Overview 33
3.3.1 I 34
C System Bus Description 34
3.3.2 I 36
C Bus Dynamics 36
I2C Port 37
Figure 3-4. I 37
C Address with ACK and NACK 37
3.3.3 I 39
C Messaging 39
Figure 3-8. I 40
C Write Flow Diagram 40
3.3.3.3 I 41
C Write Protocol 41
Figure 3-9. I 42
C Read Flow Diagram 42
3.3.3.5 I 43
C Read Procedure 43
Note: The I 44
3.4 SPI Port 45
SPI Port 46
3.4.2 SPI Bus Dynamics 47
3.4.3 SPI Messaging 48
3.4.3.2 SPI Write Protocol 49
Parallel Control Availability 55
5.1.1 DAI Pin Description 57
5.1.3 BDI Port 59
5.1.4 Digital Audio Formats 60
DAI Hardware Configuration 61
Chapter 6 65
DSD Input 65
Chapter 7 67
Figure 7-2. I 69
OUTPUT A B C D E F 70
7.1.5 S/PDIF Transmitter 77
Description Hex Message 78
SDRAM Controller 79
Flash Memory Controller 80
Mnemonic Hex Message 83
Typical Connection Diagrams 89
Figure 9-1. LQFP-144, I 90
Figure 9-4. LQFP-144, I 93
Figure 9-6. LQFP-128, I 95
Pin Description 98
Table 9-1. Core Supply Pins 98
Table 9-2. I/O Supply Pins 98
Table 9-4. PLL Supply Pins 99
Clocking 100
Table 9-5. PLL Filter Pins 100
9.4.1 Operational Mode 101
Table 9-8. Reset Pin 102
144-Pin LQFP Pin Assigments 103
128-Pin LQFP Pin Assigments 104
the 128-Pin LQFP Pin Layout 104
Table 9-10. Pin Assignments 105
Pin Assignments 106
Revision History 117

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