Cirrus-logic CS4340 Manual do Utilizador Página 1

1Copyright © Cirrus Logic, Inc. 2005(All Rights Reserved)www.cirrus.comCS434024-Bit, 96 kHz Stereo D/A Converter for AudioFeatures! 101 dB Dynamic Ran

CS434010 DS297F3Figure 9. Double-Speed Transition Band (Detail) Figure 10. Double-Speed Passband Ripple

CS4340DS297F3 11SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE Parameters Symbol Min Max UnitsMCLK Frequency 1.024 25.6 MHzMCLK Duty Cycle 45 55 %

CS434012 DS297F3SWITCHING CHARACTERISTICS - INTERNAL SERIAL CLOCK Notes: 6. The Duty Cycle must be 50% +/− 1/2 MCLK Period.7. See section 4.2.1 for de

CS4340DS297F3 13DC ELECTRICAL CHARACTERISTICS (AGND = 0 V; all voltages with respect to AGND.) Notes: 8. Normal operation is defined as RST = HI wit

CS434014 DS297F32. PIN DESCRIPTION Pin Name # Pin DescriptionRST1Reset (Input) - Powers down device.SDATA2Serial Audio Data (Input) - Input for two’s

CS4340DS297F3 153. TYPICAL CONNECTION DIAGRAM 13Serial AudioDataProcessorExternal ClockMCLKAGNDAOUTRCS4340SDATALRCKVAAOUTL345140.1 µF+1µF12+3.0 V

CS434016 DS297F34. APPLICATIONS4.1 Sample Rate Range/Operational Mode The device operates in one of two operational modes determined by the Master Clo

CS4340DS297F3 17The internal serial clock is utilized when additional de-emphasis control is required. Operation in the InternalSerial Clock mode is i

CS434018 DS297F34.4 De-Emphasis The device includes on-chip digital de-emphasis. Figure 19 shows the de-emphasis curve for Fs equal to 44.1 kHz.The fr

CS4340DS297F3 194.5 Power-up SequenceReliable power-up can be accomplished by keeping the device in reset until the power supply and configuration pi

CS43402 DS297F3TABLE OF CONTENTS1. CHARACTERISTICS AND SPECIFICATIONS ...

CS434020 DS297F34.7 Mute ControlThe Mute Control pin goes high during power-up initialization, reset, or if the MCLK to LRCK ratio is incorrect. Thepi

CS4340DS297F3 215. PARAMETER DEFINITIONSTotal Harmonic Distortion + Noise (THD+N)A measure of crosstalk between the left and right channels. Measured

CS434022 DS297F36. REFERENCES1) CDB4340 Evaluation Board Datasheet

CS4340DS297F3 237. PACKAGE DIMENSIONS7.1 SOIC INCHES MILLIMETERSDIM MIN NOM MAX MIN NOM MAXA 0.053 0.064 0.069 1.35 1.63 1.75A1 0.004 0.006 0.010 0.1

CS434024 DS297F37.2 TSSOP Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold mismatch and

CS4340DS297F3 258. PACKAGE THERMAL RESISTANCE Package Symbol Min Typ Max UnitsSOIC(for multi-layer boards)TSSOP (for multi-layer boards)θJAθJA--7489-

CS4340DS297F3 35. PARAMETER DEFINITIONS ...

CS43404 DS297F31. CHARACTERISTICS AND SPECIFICATIONS(Min/Max performance characteristics and specifications are guaranteed over the Specified Operatin

CS4340DS297F3 5ANALOG CHARACTERISTICS (CS4340-KS/KSZ/CZZ) (Test conditions (unless otherwise specified): Input test signal is a 997 Hz sine wave at 0

CS43406 DS297F3ANALOG CHARACTERISTICS (CS4340-KS/KSZ/CZZ) (Continued) Notes: 2. One-half LSB of triangular PDF dither is added to data.3. Refer to F

CS4340DS297F3 7ANALOG CHARACTERISTICS (CS4340-DSZ) (Test conditions (unless otherwise specified): Input test signal is a 997 Hz sine wave at 0 dBFS; m

CS43408 DS297F3ANALOG CHARACTERISTICS (CS4340-DSZ) (Continued) COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE (Thefilter characteristics

CS4340DS297F3 9 Figure 3. Single-Speed Stopband Rejection Figure 4. Single-Speed Transition BandFigure 5. Single-Speed Transition Band (Deta