Cirrus-logic CS4339 Manual do Utilizador descarregar pdf (Página 11)

CS4334/5/8/9

sclkh

slrs

slrd

sdlrs

sdh

sclkl

SDATA

SCLK

LRCK

Figure 5. External Serial Mode Input Timing

SDATA

*INTERNAL SCLK

LRCK

sclkw

sdlrs

sdh

sclkr

Figure 6. Internal Serial Mode Input Timing

The SCLK pulses shown are internal to the CS4334/5/8/9.

SDATA

LRCK

MCLK

*INTERNAL SCLK

Figure 7. Internal Serial Clock Generation

* The SCLK pulses shown are internal to the CS4334/5/8/9.

N equals MCLK divided by SCLK

1 2 ... 6 7 8 9 10 11 12 13 14 15 16 ... 24 25

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Cirrus-logic CS4339 Manual do Utilizador Página 11