Cirrus-logic AN379 Manual do Utilizador

Copyright  Cirrus Logic, Inc. 2014(All Rights Reserved)Cirrus Logic, Inc.http://www.cirrus.comApplication NoteDesign Guide for a CS1680 DimmableLED D

AN37910 AN379REV2Dimming OperationThe dimmer conduction time or phase cut information is extracted by the boost stage and supplied to the buck stage a

AN379AN379REV2 11Step 2) Select an Appropriate FETDetermine the FET breakdown voltage VBreakdown and margin voltage VMargin. The maximum FET drain vo

AN37912 AN379REV2Step 5) Calculate Buck Sense ResistorThe CS1680 current sense threshold VBUCKPK(th) is set by the buck sense resistor. The voltage d

AN379AN379REV2 13Step 8) Buck Inductor SpecificationThis step is the first iteration of the inductor design. Due to design constraints, the following

AN37914 AN379REV2can be added to suppress high frequency ringing on the drain node. A resistor divider may be inserted at the BUCKZCD input to limit t

AN379AN379REV2 15power in poor dimmer/transformer combinations. The Mode3 algorithm requires maximum peak currentIBSTPK(max) to be set by sense resist

AN37916 AN379REV2Step 12) Calculate Boost Sense ResistorMaximumpeakcurrentIBSTPK(max)issetbytheboostsenseresistor.BoostsenseresistorRBST

AN379AN379REV2 17the CCM algorithm. Boost inductance LBST does not affect the switching frequency. Changes to the boost inductor alters only the peak-

AN37918 AN379REV2Step 17) Boost Input Capacitor SelectionTo sustain compatibility with a wide range of transformers paired with a leading-edge or trai

AN379AN379REV2 19resistor RCLAMP must comply with the relation defined in Equation 38:Using the denominators of Equations 37 and 38, the inequality PT

AN3792 AN379REV2 IMPORTANT SAFETY INSTRUCTIONS Read and follow all safety instructions prior to using this demonstration board. This Engineering Eval

AN37920 AN379REV2Step 22) LayoutBasics for any power layout:• Keep power traces as short as possible.• Keep the controller away from power components

AN379AN379REV2 214 Design ExampleThe required operating parameters for the analytical process are outlined in the table below.Notes: 1. It is desirabl

AN37922 AN379REV2It is desirable to maintain a minimum margin of 8V and to use a FET with a breakdown voltage of 50V. Solving Equation 44 for voltage

AN379AN379REV2 23Calculate buck inductance LBUCK at maximum boost voltage VBST(max) and maximum voltage VOUT(max). The current through inductor LBUCK

AN37924 AN379REV2Step 10) Zero-current DetectionZero-crossings are detected by AC coupling the drain voltage of FET QBUCK to pin BUCKZCD. Capacitor C2

AN379AN379REV2 25Step 12) Calculate Boost Sense ResistorSense resistor RBST(Sense) is designed to hit maximum peak current IBSTPK(max) at a threshold

AN37926 AN379REV2Step 15) Determine Constant Peak Current for Mode2Sense resistor RBST(Sense) is used to set the maximum peak current for the Mode3 al

AN379AN379REV2 27Solving Equation 36 on page 18 for damping capacitance Cdamp yields Equation 71:whereCdamp = damping capacitor C12 and selected as 1

AN37928 AN379REV25 Appendix5.1 SchematicFigure 6. SchematicD.PAPANDREAD.PAPANDREA600-00697-Z1 REV_D0SHEETOFSHEETENGINEERDA

AN379AN379REV2 295.2 DimensionsFigure 7. PCB Dimensions

AN379AN379REV2 32 IntroductionThis application note is a guide to designing a low-voltage solid-state lighting (SSL) LED lamp circuit using Cirrus Log

AN37930 AN379REV25.3 Bill of MaterialsLine Item Description QtyUM Reference Designator Manufacturer Manufacturer Part Number0001 CAP 10uF ±10% 25V X7

AN379AN379REV2 31Revision History Revision Date ChangesREV2 FEB 2014 Content release for revision B silicon

AN3794 AN379REV22.2 Definition of SymbolsSymbol DescriptionFBSTSW, FBUCKSWSwitching frequency for boost stage and buck stageTTBST, TTBUCKSwitching per

AN379AN379REV2 53 Design ProcessThe design process for a two-stage power converter system can be partitioned into five circuit blocks (see Figure 1).

AN3796 AN379REV23.1 Operating ParametersTo initiate the design procedure, a set of operating parameters is required. Operating parameters required for

AN379AN379REV2 73.3 Buck Stage DesignFigure 2 illustrates the steps for designing the buck stage.Figure 2. Buck Stage DesignBuck SpecificationDetermi

AN3798 AN379REV2The Buck TopologyFigure 3 illustrates a typical implementation of a buck converter using the CS1680 controller. The load is composed o

AN379AN379REV2 9The CS1680 maximum switching frequency is 312.5kHz. Test results indicate that optimal performance is obtained in the range of 75kHz t