Cirrus-logic AN312 Manual do Utilizador descarregar pdf (Página 2)

2 AN312REV2

AN312

Figure 1. - CobraNet Clock Circuit for CM-1 Module

Figure 2. CobraNet Clock Circuit for CM-2 Module and Semiconductors

Beat Received

VCXO

24.576MHz

+/- 100 PPM

DAC

MCLK_IN

MCLK_SEL

REFCLK_Enable

REFCLK_Polarity

REFCLK

Edge

Detect

MCLK

MUX

Beat

MUX

Phase

Detector

Sample

Phase

Counter

RST

Loop

Filter

control

Clock

Out

MCLK_OUT (master)

FS1 (word)

SCK (bit)

Audio

Clock

Generator

Clock Config

Signal

Path

Control

Path

Hardware FPGA Software

Beat Received

VCXO

24.576MHz

+/- 100 PPM

DAC

MCLK_IN

MCLK_SEL

REFCLK

MCLK

MUX

Beat

MUX

Phase

Detector

Sample

Phase

Counter

Loop

Filter

control

Clock

Out

MCLK_OUT (master)

FS1 (word)

SCK (bit)

Audio

Clock

Generator

Clock Config

Signal

Path

Control

Path

External

Hardware

CobraNet

Processor

Software

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