Cirrus-logic CDB5581 Manual do Utilizador

Consulte online ou descarregue Manual do Utilizador para Hardware Cirrus-logic CDB5581. Cirrus Logic CDB5581 User Manual Manual do Utilizador

  • Descarregar
  • Adicionar aos meus manuais
  • Imprimir
  • Página
    / 26
  • Índice
  • MARCADORES
  • Avaliado. / 5. Com base em avaliações de clientes
Vista de página 0
Copyright Cirrus Logic, Inc. 2009
(All Rights Reserved)
www.cirrus.com
CDB5581
200 kSps, 16-bit, High-throughput
ΔΣ
ADC
Evaluation Board
Features
Analog Input Channel to the CS5581 ADC
Pre-configured to require a minimum number of external
connections to your data acquisition system.
All functionality accessible through the connector interface
and board-level options.
On-board 4.096 V Reference
Pre-configured for Master mode SPI™ communication to a
data capture system.
General Description
The CDB5581 is a versatile tool designed for evaluating the func-
tionality and performance of the CS5581 ADC (Analog-to-Digital
Converter). The SPI serial port on the CDB5581 evaluation board
is configured in Master mode and will start transmitting data after
power-up upon reset. This evaluation board is designed to connect
to your data capture system or will interface to the CapturePlus II
data acquisition system available from Cirrus Logic.
The CS5581 delta-sigma ADC produces fully settled conversions to
full specified accuracy at 200 kSps. This ability to produce fully set-
tled conversions for every sample makes it suitable for converting
multiplexed input signals. To help evaluate this feature, the CDB5581
includes two single-ended analog inputs multiplexed into the
CS5581. The multiplexer can be switched at the CS5581 ADC sam-
ple speed and the ADC will produce fully settled conversion data for
each input channel.
All evaluation board functionality for evaluating the CS5581 ADC is
accessed through the connector interface and board-level options.
Schematics in PADS™ PowerLogic™ format are available for
download at:
http://www.cirrus.com/en/products/pro/detail/P1120.html
.
ORDERING INFORMATION
CDB5581 Evaluation Board
OCT ‘09
DS796DB3
Vista de página 0
1 2 3 4 5 6 ... 25 26

Resumo do Conteúdo

Página 1 - Evaluation Board

Copyright  Cirrus Logic, Inc. 2009(All Rights Reserved)www.cirrus.comCDB5581200 kSps, 16-bit, High-throughput ΔΣ ADCEvaluation BoardFeatures Analog

Página 2 - LIST OF TABLES

CDB558110 DS796DB3APPENDIX B. BILL OF MATERIALS CIRRUS LOGICCDB5581_REV_A1.PLBILL OF MATERIALCirrus P/N Rev Description Qty

Página 3 - 1. INTRODUCTION

CDB5581DS796DB3 11APPENDIX C. SCHEMATICS Figure 3. Schematic - Block Diagram

Página 4 - 1.1 Overview

CDB558112 DS796DB3 Figure 4. Schematic - Power Supplies

Página 5 - DC Supply

CDB5581DS796DB3 13 Figure 5. Schematic - Input Buffers and Multiplexer

Página 6 - 3.3.1 Analog Input Buffers

CDB558114 DS796DB3 Figure 6. Schematic - CS5581

Página 7 - 3.3.5 ADC Reference Frequency

CDB5581DS796DB3 15 Figure 7. Schematic - Configuration & Misc.

Página 8 - 3.4.1 Hardware Configuration

CDB558116 DS796DB3APPENDIX D. LAYER PLOTS Figure 8. Top SilkscreenCalibration function has been removed from the

Página 9 - A.2 Hardware Considerations

CDB5581DS796DB3 17 Figure 9. Top Solder Mask

Página 10 - 10 DS796DB3

CDB558118 DS796DB3 Figure 10. Top Routing

Página 11 - DS796DB3 11

CDB5581DS796DB3 19 Figure 11. Ground Plane

Página 12 - 12 DS796DB3

CDB55812 DS796DB3TABLE OF CONTENTS1. INTRODUCTION ...

Página 13 - DS796DB3 13

CDB558120 DS796DB3 Figure 12. Power Plane

Página 14 - Figure 6. Schematic - CS5581

CDB5581DS796DB3 21 Figure 13. Bottom Solder Mask

Página 15 - DS796DB3 15

CDB558122 DS796DB3 Figure 14. Bottom Silkscreen

Página 16 - 16 DS796DB3

CDB5581DS796DB3 23 Figure 15. Top Solder Paste Mask

Página 17 - Figure 9. Top Solder Mask

CDB558124 DS796DB3 Figure 16. Bottom Routing

Página 18 - Figure 10. Top Routing

CDB5581DS796DB3 25APPENDIX E. CALIBRATION FUNCTIONThe calibration function has been removed from the CS5581. All references to calibration have been r

Página 19 -

CDB558126 DS796DB3REVISION HISTORY Revision Date ChangesDB1 AUG 2007 Initial Release.DB2 DEC 2007 Updated schematic t

Página 20 - Figure 12. Power Plane

CDB5581DS796DB3 31. INTRODUCTIONThe CDB5581 evaluation board is a platform for evaluating the CS5581 ADC performance. The evalua-tion board is design

Página 21 - DS796DB3 21

CDB55814 DS796DB31.1 OverviewThe CDB5581 evaluation board has both analog and digital circuit sections. The analog section consistsof the CS5581 ADC,

Página 22 - Figure 14. Bottom Silkscreen

CDB5581DS796DB3 52. QUICK START The CDB5581 evaluation board is designed to interface with a data acquisition system. To conne

Página 23

CDB55816 DS796DB33. HARDWARE DESCRIPTION3.1 Absolute Maximum RatingsObserve the following limits to ensure the CDB5581 component ratings are not excee

Página 24

CDB5581DS796DB3 7The analog inputs are designed for connections to single-ended input signals referenced to ground. Theusable input voltage range is -

Página 25 - DS796DB3 25

CDB55818 DS796DB33.4 Digital Section3.4.1 Hardware ConfigurationThe CDB5581 evaluation board hardware comes pre-configured so the only connection requ

Página 26

CDB5581DS796DB3 9APPENDIX A. MAXIMIZING THE PERFORMANCE OF THE CS5581A.1 PCB Layout Considerations• Keep the signal path short between the CS5581 ADC

Comentários a estes Manuais

Sem comentários